Provide PDF Format
JEDEC JESD52
- STANDARD FOR DESCRIPTION OF LOW VOLTAGE TTL-COMPATIBLE CMOS LOGIC DEVICES
- standard by JEDEC Solid State Technology Association, 11/01/1995
- Publisher: JEDEC
$28.00$56.00
This standard describes dc interface specifications and test environment for these devices that operate with 2.7 V to 3.6 V power supplies. The goal is to provide a consistent set of dc specifications for reference by logic suppliers and users alike.
Related Products
JEDEC JESD51-7
HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD FOR LEADED SURFACE MOUNT PACKAGES..
$27.00 $53.00
JEDEC JEP138
USER GUIDELINES FOR IR THERMAL IMAGING DETERMINATION OF DIE TEMPERATURE..
$27.00 $53.00